Semiconductor device and method for manufacturing the same

ABSTRACT

Disclosed is a semiconductor device comprising a semiconductor substrate, a porous insulating film formed above the semiconductor substrate, the porous insulating film having a relative dielectric constant of 2.5 or less and including a first insulating material, at least a portion of pores in the porous insulating film having on the inner wall thereof a layer of a second insulating material which differs in nature from the first insulating material, and a plug and/or a wiring layer buried in the porous insulating film.

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is based upon and claims the benefit of priorityfrom the prior Japanese Patent Application No. 2002-324104, filed Nov.7, 2002, the entire contents of which are incorporated herein byreference.

BACKGROUND OF THE INVENTION

[0002] 1. Field of the Invention

[0003] This invention relates to a semiconductor device and to themanufacturing method thereof, and in particular, to a semiconductordevice having a low dielectric constant film as an interlayer insulatingfilm and to the manufacturing method thereof.

[0004] 2. Description of the Related Art

[0005] In order to minimize any delay of wiring portions in asemiconductor device, it is highly desirable to minimize the relativedielectric constant of an interlayer insulating film. In order to securea sufficiently low relative dielectric constant, it is possible toemploy a method wherein the interlayer insulating film is made into aporous insulating film by incorporating voids or pores into theinterlayer insulating film. In this regard, it is possible, in the caseof an organic silicone film to reduce the relative dielectric constantof the film to 2.5 or less if the average diameter of the pores iswithin the range of about 2 to 3 nm.

[0006] The larger the diameter of pores is, the lower the relativedielectric constant of the insulating film would become. However, evenif it is possible to lower the relative dielectric constant ofinsulating film in this manner, the reliability of wirings may be badlyaffected by this. For example, in the case of a porous insulating filmwhose maximum pore diameter is 4 nm or more, the followinginconveniences would be brought about on the occasion of forming a metalwiring by a damascene method. Namely, if such an insulating film isworked to form a trench therein, pores of relatively large size areexposed from the sidewall of the trench, thus producing hollows thereon.As a result, it becomes difficult to form a continuous barrier metalfilm thereon. As a result, the reliability of wirings may be badlydeteriorated.

[0007] On the other hand, if the average diameter of pores in the porousinsulating film is to 1 nm or less, it may become difficult tosufficiently minimize the relative dielectric constant of interlayerinsulating film.

BRIEF SUMMARY OF THE INVENTION

[0008] A semiconductor device according to one embodiment of the presentinvention comprising:

[0009] a semiconductor substrate;

[0010] a porous insulating film formed above the semiconductorsubstrate, the porous insulating film having a relative dielectricconstant of 2.5 or less and including a first insulating material, atleast a portion of pores in the porous insulating film having on theinner wall thereof a layer of a second insulating material which differsin nature from the first insulating material; and

[0011] a plug and/or a wiring layer buried in the porous insulatingfilm.

[0012] A semiconductor device according to another embodiment of thepresent invention comprising:

[0013] a semiconductor substrate;

[0014] a porous insulating film formed above the semiconductor substrateand having a relative dielectric constant of 2.5 or less, an averagediameter of pores in the porous insulating film being smaller in asurface region of the porous insulating film than in an inner region ofthe porous insulating film; and

[0015] a plug and/or a wiring layer buried in the porous insulatingfilm.

[0016] A method for manufacturing a semiconductor device according toone embodiment of the present invention comprises:

[0017] forming a porous insulating film above a semiconductor substrate,the porous insulating film having a relative dielectric constant of 2.5or less;

[0018] forming a recessed portion on a surface of the porous insulatingfilm; and

[0019] filling the recessed portion with a conductive material to form aplug and/or a wiring layer;

[0020] wherein prior to filling the recessed portion with the conductivematerial, the porous insulating film is placed inside a chamber toexpose the porous insulating film to an oxidizing gas flow and areducing gas flow which have been alternately introduced into thechamber, to take place an oxidation-reduction reaction in the porousinsulating film, thereby forming a layer of a reaction product on innerwalls of pores of the porous insulating film.

[0021] A method for manufacturing a semiconductor device according toanother embodiment of the present invention comprises:

[0022] forming a porous insulating film above a semiconductor substrate;

[0023] forming a recessed portion on a surface of the porous insulatingfilm; and

[0024] filling the recessed portion with a conductive material to form aplug and/or a wiring layer;

[0025] wherein the porous insulating film is irradiated with electronbeam to enlarge the size of pores of the porous insulating film.

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWING

[0026]FIGS. 1A to 1C respectively shows a cross-sectional view forillustrating the manufacturing method of a semiconductor deviceaccording to Embodiment 1 of the present invention;

[0027]FIGS. 2A and 2B are graphs illustrating the distribution of poresize in a porous insulating film;

[0028]FIGS. 3A and 3B are graphs illustrating the distribution of poresize in a porous insulating film;

[0029]FIGS. 4A to 4C respectively shows a cross-sectional view forillustrating the manufacturing method of a semiconductor deviceaccording to Embodiment 2 of the present invention;

[0030]FIGS. 5A and 5B respectively shows a cross-sectional view forillustrating the manufacturing method of a semiconductor deviceaccording to Embodiment 3 of the present invention; and

[0031]FIGS. 6A and 6B are graphs illustrating the distribution of poresize in a porous insulating film.

DETAILED DESCRIPTION OF THE INVENTION

[0032] Next, specific embodiments of the present invention will beexplained with reference to drawings.

[0033] (Embodiment 1)

[0034]FIGS. 1A to 1C respectively shows a cross-sectional view forillustrating the manufacturing method of a semiconductor deviceaccording to one embodiment of the present invention.

[0035] First of all, as shown in FIG. 1A, a porous insulating film 2 isformed on a semiconductor substrate 1 having semiconductor elements (notshown) formed thereon. The porous insulating film 2 may be constitutedby either an organic insulating film or an organic silicone film, whichmay be deposited by a coating method or a CVD method. More specifically,examples of the organic insulating film include polyarylene andpolyarylene polyether. Examples of the organic silicone film includemethylsilsesquioxane (MSQ), polymethyl siloxane (MSX), etc. It is alsopossible to employ any other insulating films as long as they areporous.

[0036] If a porous insulating film 2 formed of an MSQ film is depositedon a substrate by a coating method, one having a weight averagemolecular weight ranging from 100,000 to 10,000,000 or so is dissolvedin an organic solvent such as an alcoholic solvent to prepare a varnish,which is then coated on a semiconductor substrate 1 and heated for 10 to120 minutes at a temperature ranging from 200 to 500° C. to vaporize thesolvent. Thereafter, the coated layer is further heated to take place achemical bonding reaction to obtain a porous insulating film 2 having arelative dielectric constant of 2.5 or less.

[0037] The pores in the porous insulating film 2 thus obtained are notin a completely independent state but are partially communicated witheach other through a fine space formed between neighboring pores, thusto reach the surface of the film. The diameter of these pores can beobserved by cross-sectional transmission electron microscopy (TEM). Asshown in FIG. 1A, there will be sometimes recognized the existence of alarge pore 3 having a maximum diameter of 4 nm or more.

[0038] If a trench is formed at a region where such a large pore 3 isformed in a subsequent step, a hollow having a size corresponding to thesize of the pore 3 is formed on the sidewall of the trench, therebymaking it difficult to form a continuous barrier metal film.

[0039] In the present embodiment however, an oxidation-reductionreaction is permitted to take place in the porous insulating film 2 byusing an ALD (Atomic Layer Deposition)-CVD device prior to forming atrench in the porous insulating film 2, thereby making it possible toreduce the size of the large pore 3 to an optimum size.

[0040] To be more specific, first of all, the semiconductor substrate 1having the porous insulating film 2 formed thereon is placed in afilm-forming chamber and heated to a temperature ranging from 200 to500° C., for example 400° C. and at the same time, an oxidizing gas anda reducing gas are alternately introduced into the chamber under apressure ranging from 0.1 to 10 Torr, for example 5 Torr.

[0041] As for the oxidizing gas, it is possible to employ at least oneselected from the group consisting of O₂, N₂O, Cl₂, F₂, O₃ and WF₆. Asfor the reducing gas, it is possible to employ at least one selectedfrom the group consisting of SiH₄, H₂ and HF. These two kinds of gasescan be employed in any optional combination with the flow rate thereofbeing controlled to range from 10 to 500 sccm, for example 100 sccm.

[0042] When O₂ gas is employed as an oxidizing gas and SiH₄ gas isemployed as a reducing gas, the SiH₄ gas is introduced into the chamberfor 30 seconds at a flow rate of 100 sccm, which is followed by apurging step of 30 seconds using Ar gas. Then, the O₂ gas is introducedinto the chamber for 30 seconds at a flow rate of 100 sccm, which isfollowed by a purging step of 30 seconds using Ar gas. Namely, one cycleof treatment using gases is accomplished by the sequential introductionof SiH₄ gas-Ar gas-O₂ gas-Ar gas in this manner. The period of time forintroducing each of these gases may be optionally selected from a periodof 5 to 60 seconds.

[0043] Although it is possible, with the employment of Ar gas as apurging gas, to discharge the SiH₄ gas from the chamber, the SiH₄ gasthat has been introduced into the pores of the porous insulating film 2adsorbs onto the inner walls of the pores. When O₂ gas is subsequentlyintroduced into the chamber, the residual SiH₄ gas left remained insidethe pores reacts with this O₂ gas to deposit the reaction product, i.e.silicon oxide (SiO₂) 4 on the inner walls of pores, as shown in FIG. 1B.

[0044] This means that at least some of the pores 3 of the porousinsulating film (a first insulating material) which is formed of anorganic insulating film or an organic silicone film are enabled to havea layer of reaction product (a second insulating material) 4.

[0045] In this manner, it is possible to reduce the maximum diameter ofthe pores 3 to 3 nm or less through the deposition of the reactionproduct 4 on the inner walls of the pores. It has been confirmed that aslong as the maximum diameter of the pores 3 is 3 nm or less, theformation of a barrier metal film would not be badly affected by thepores 3 even if the pores 3 are exposed from the sidewall of trench dueto the trench-forming work. It has been also confirmed that when theaforementioned cycle of treatment using gases is repeated 50 times underthe aforementioned conditions, the pores having a diameter of 5 nm canbe reduced in size to 2 nm in diameter.

[0046] The distribution of pore size in the porous insulating film 2before and after the aforementioned treatment is shown in the graphs ofFIGS. 2A and 2B, respectively. Specifically, FIG. 2A shows thedistribution before the treatment and FIG. 2B shows the distributionafter the treatment. Since these gases can be easily introduced into thepores and the quantity of gases to be deposited thereon would berelatively large, the reaction product 4 would be deposit on the innerwall of larger pores 3 in preference to the inner wall of smaller pores3. Therefore, as clearly shown in FIG. 2B, the pores 3 having a diameterof 4 nm or more do not exist after the treatment.

[0047] As far as the porous insulating film 2 is concerned, since thegases can be more easily penetrate into the surface region thereof ascompared with the inner region thereof, the quantity of the reactionproduct 4 to be deposited on the surface region of porous insulatingfilm 2 can be made larger than that to be deposited on the inner regionof porous insulating film 2. FIGS. 3A and 3B illustrate the changes inpore size due to the aforementioned treatment in the surface region aswell as in the inner region of the porous insulating film 2. Morespecifically, FIG. 3A represents the distribution of pore size in thesurface region occupying about 20% of the entire thickness of the porousinsulating film 2, and FIG. 3B represents the distribution of pore sizein the middle region in thickness-wide of the porous insulating film 2.In any of these graphs, the distribution of pore size before theaforementioned treatment (FIG. 2A) is represented by the curve “a”. Thedistribution of pore size in the surface region after the aforementionedtreatment was such that the peak thereof was located around 1 nm asshown by the curve “b” and the mean diameter of the pore size was about1.0 nm. On the other hand, the distribution of pore size in the middleregion after the aforementioned treatment was such that the peak thereofwas located around 1.5 nm as shown by the curve “c” and the meandiameter of the pore size was about 1.3 nm. It will be seen from thesegraphs that an average diameter of the pore size in the porousinsulating film 2 was made smaller in the surface region as comparedwith that in the inner region of the porous insulating film 2.

[0048] As the average diameter of the pore size in the surface region ofthe pores 3 is made smaller than that of the inner region of the porousinsulating film 2 in this manner, the hardness and the density of theporous insulating film 2 are enabled to increase, thereby making itpossible to enhance the mechanical and chemical strength of the porousinsulating film 2. As a result, it is now possible to enhance theresistance of the porous insulating film 2 on the occasion of ashing forremoving a resist employed for forming the trench, on the occasion oftreatments using a chemical liquid, or on the occasion of polishingtreatment for burying a plug or a wiring layer in the trench.

[0049] Moreover, since the maximum diameter of the pores 3 is reduced inadvance to 3 nm or less, the formation of a barrier metal film would notbe badly affected by the pores 3 even if a hollow is formed on thesidewall of trench due to the trench-forming work for forming wirings orcontacts on the porous insulating film 2 after the treatment of thepores 3. Therefore, it is now possible to form a continuous barriermetal film 5 of Ta or TaN inside the trench and to bury a Cu wiring 6 inthe trench as shown in FIG. 1C.

[0050] (Embodiment 2)

[0051] The pores of large diameter in the porous insulating film can bereduced in size by using an oxidation-reduction reaction after formingthe trench.

[0052]FIGS. 4A to 4C respectively shows a cross-sectional view forillustrating the manufacturing method of a semiconductor deviceaccording to Embodiment 2.

[0053] By following the same procedures as illustrated in the previousEmbodiment 1, a porous insulating film 2 is formed on a semiconductorsubstrate 1 as shown in FIG. 4A. On this occasion, there will besometimes recognized the existence of a large pore 3 having a maximumdiameter of 4 nm or more in the porous insulating film 2.

[0054] In this embodiment, a trench 8 is formed in such a porousinsulating film 2. As a result, as shown in FIG. 4B, a hollow 12 havinga size corresponding to the size of the pore 3 is formed on the sidewallof the trench 8.

[0055] The semiconductor substrate 1 having thereon the porousinsulating film 2 accompanying the hollow 12 is placed in the samefilm-forming chamber as employed the previous embodiment and heated inthe same manner as illustrated in the previous embodiment and at thesame time, an oxidizing gas and a reducing gas are alternatelyintroduced into the chamber. In the case of the porous insulating film 2to be treated in this embodiment, since the hollow 12 is formed on thesidewall of the trench 8, the conditions for introducing these gasesinto the chamber should be suitably altered to enable the hollow 12 tobe selectively filled with the reaction product. Namely, the hollows,i.e. the pores that have been exposed from the sidewall of the trenchcan be selectively filled with a reaction product by raising thepressure in the chamber and by shortening the time for introducing eachof the gases. Specifically, the aforementioned selective filling of thepores can be achieved by setting the pressure inside the chamber to therange of about 1 to 50 Torr, for example 10 Torr, and by setting thetime for introducing each of the oxidizing gas, the reducing gas and thepurging gas to the range of about 10 to 30 seconds, for example 10seconds.

[0056] By performing the treatment of the porous insulating film 2 inthis manner after forming the trench, the hollows formed on the sidewallof the trench can be selectively filled with a reaction product withoutunduly reducing the diameter of the pores located in the inner region ofthe porous insulating film 2. Therefore, it is now possible to form acontinuous barrier metal film 5 of Ta or TaN inside the trench and tobury a Cu wiring 6 in the trench as shown in FIG. 4C. As alreadyexplained above, since the reaction product 7 deposits on the pores 3existing in the surface region in preference to the pores 3 located inthe inner region of the porous insulating film 2, the porous insulatingfilm 2 thus treated would become such that in addition to thecontraction in size of the pores located in the surface region asmentioned above, the pores 3 which are located near the wiring layerwould also be contracted in size.

[0057] According to the method set forth by this embodiment, the hollowsformed on the sidewall of the trench can be selectively filled with adeposited material, while permitting the pores located in the innerregion of the porous insulating film 2 to keep their larger size.Therefore, this method is advantageous in that the relative dielectricconstant of the porous insulating film can be maintained at a lowerlevel.

[0058] (Embodiment 3)

[0059]FIGS. 5A and 5B respectively shows a cross-sectional view forillustrating the manufacturing method of a semiconductor deviceaccording to Embodiment 3 of the present invention.

[0060] As shown in FIG. 5A, a porous insulating film 9 is formed on asemiconductor substrate 1 having semiconductor elements (not shown)formed thereon and a trench is formed in the porous insulating film 9,which is then filled with a Cu wiring 6 with a barrier metal film 5being interposed therebetween. The porous insulating film 9 may beconstituted by either an organic silicone film having CH₃ group (forexample, MSQ film, MSX film, etc.) or an organic insulating film (forexample, polyarylene, polyarylene polyether, etc.).

[0061] When a porous insulating film 9 consisting of an MSQ film isformed by coating method, very minute pores 10 having an averagediameter of 1 nm or less may be formed in the porous insulating film 9,depending on the conditions to be employed. Namely, this phenomenon maybe generated when an MSQ film is formed by the procedures wherein MSQhaving a weight average molecular weight ranging from 100 to 10,000 orso is dissolved in an organic solvent such as an alcoholic solvent toprepare a varnish, which is then coated on a semiconductor substrate 1and heated for 10 to 120 minutes at a temperature ranging from 200 to500° C. to vaporize the solvent, and thereafter, the coated layer isfurther heated to take place a chemical bonding reaction to obtain theporous insulating film.

[0062] Further, even when the porous insulating film 9 is formed by CVDmethod, very minute pores 10 having an average diameter of 1 nm or lessmay be formed in the porous insulating film 9, depending on theconditions to be employed. Namely, the conditions which enable theformation of such an insulating film are: where a plane-parallel plateplasma CVD apparatus is employed, 350° C. in film-forming temperature;600/100/200 sccm in the ratio of trimethyl silane SiH(CH₃)₃/He/O₂; 4Torr; and 400W in RF power.

[0063] In the case of this porous insulating film 9, since the averagediameter of the pores 10 is very small, there would be littlepossibility of raising problems such as defective filling of a barriermetal even if the pores 10 exposes from the sidewall of the trench dueto the aforementioned trench-forming work. Therefore, it is possible toform a wiring excellent in reliability. However, it would be impossibleto sufficiently decrease the relative dielectric constant of theinsulating film, thus the insulating film exhibits a dielectric constantof 2.5 or more.

[0064] Therefore, it is proposed in this embodiment to enlarge thediameter of the pores by etching the inner wall of the pores located inthe inner region of the insulating film by irradiating an electron beam(EB). This can be accomplished, where an organic silicone film isemployed, by introducing N₂ gas or O₂ gas at a flow rate ranging from100 to 10000 sccm, for example 1000 sccm under the conditions of: 1-20kV, for example 10 kV in accelerating voltage; 0.1-100 Torr, for example10 Torr in pressure; and 10-20000 μC/cm², for example 600 μC/cm² indosage of EB. In the case where an organic insulating film is employed,not only N₂ gas and O₂ gas but also H₂ gas can be used.

[0065] For example, when an organic silicone film is irradiated with EBin N₂ gas atmosphere, N₂ gas that has been introduced into the pores canbe excited to generate radicals, thereby enabling the inner wall of thepores to be etched through the elimination of CH₃ group from the organicsilicone film. As a result, the pores are enlarged, forming enlargedpores 11 as shown in FIG. 5B. In the case of the organic insulatingfilm, carbon in the insulating film can be eliminated, thereby enlargingthe pores 10 in size.

[0066]FIGS. 6A and 6B show the changes in distribution of pore size in aporous insulating film before and after the irradiation of EB. FIG. 6Ashows a distribution of pore size prior to the irradiation of EB,wherein the average diameter thereof is as small as 1 nm or less. Whenthe porous insulating film is irradiated with EB, the diameter of thepores is enlarged as a whole, thereby making it possible to obtain thepores having an average diameter ranging from about 2 to 3 nm as shownin FIG. 6B. As a result, the relative dielectric constant of the porousinsulating film can be reduced to 2.5 or less.

[0067] In the embodiment described above in particular, since theirradiation of EB is performed after burying the wiring, the propertiesof the barrier metal film buried in this manner would not be badlyaffected even if pores of relatively large size are generated in theinsulating film. Rather, it would become more advantageous by increasingthe size of the pores to lower the relative dielectric constant of theinsulating film. Therefore, the insulating film may include pores havinga diameter of 5 nm or more, thereby making it possible, in this case, tolower the relative dielectric constant of the insulating film to nothigher than 2.

[0068] Incidentally, the magnitude of etching of the inner wall of thepores can be controlled by adjusting the dosage of EB. Namely, thelarger the dosage of EB is, the larger the magnitude of etching wouldbecome. Therefore, it is possible, through the adjustment of the dosageof EB, to increase the diameter of pores to a desired magnitude. Forexample, if it is desired to confine the maximum diameter of the poresafter etching for enlarging the pore size to 3 nm or so, the dosage ofEB may be more or less decreased, for example, to 300 μC/cm². In thiscase, the other conditions such as accelerating voltage and pressure maybe the same as mentioned above.

[0069] This technique can be applied to the porous insulating filmbefore burying wirings, more specifically, prior to or subsequent toforming the trench, thereby enabling the pores having an averagediameter of not more than 1 nm to have an enlarged diameter of 3 nm orso at maximum. Since the maximum diameter of the pores can be controlledto not larger than 3 nm after enlarging the diameter of the pores, evenif the pores are exposed from the sidewall of the trench to form hollowsthereon, the properties of the barrier metal film buried as describedabove would not be badly affected. Moreover, it is possible, in thiscase, to lower the relative dielectric constant of the insulating filmto not higher than 2.5.

[0070] As describe above in detail, according to these embodiments ofthe present invention, it is possible to provide a semiconductor devicehaving an insulating film which is sufficiently low in relativedielectric constant. Further, according to the these embodiments of thepresent invention, it is possible to provide a method of manufacturing asemiconductor device, which is capable of forming an insulating filmwhich is sufficiently low in relative dielectric constant withoutpossibilities of inviting the deterioration of the properties of abarrier metal film.

[0071] The present invention would be highly useful in the manufactureof a semiconductor device having a multi-layer wiring structure, inparticular, a damascene wiring structure, thus rendering the presentinvention very valuable in industrial viewpoints.

[0072] Additional advantages and modifications will readily occur tothose skilled in the art. Therefore, the invention in its broaderaspects is not limited to the specific details and representativeembodiments shown and described herein. Accordingly, variousmodifications may be made without departing from the spirit or scope ofthe general inventive concept as defined by the appended claims andtheir equivalents.

What is claimed is:
 1. A semiconductor device comprising: a semiconductor substrate; a porous insulating film formed above said semiconductor substrate, said porous insulating film having a relative dielectric constant of 2.5 or less and including a first insulating material, at least a portion of pores in said porous insulating film having on the inner wall thereof a layer of a second insulating material which differs in nature from said first insulating material; and a plug and/or a wiring layer buried in said porous insulating film.
 2. The semiconductor device according to claim 1, wherein said pores having a layer of a second insulating material on the inner walls thereof has a maximum diameter of 3 nm or less.
 3. The semiconductor device according to claim 1, wherein said first insulating material comprises an organic component, and said second insulating material comprises a silicon oxide.
 4. The semiconductor device according to claim 1, wherein said first insulating material is selected from the group consisting of polyarylene, polyarylene polyether, methylsilsesquioxane and polymethylsiloxane.
 5. The semiconductor device according to claim 1, wherein said plug and/or wiring layer is formed of a Cu layer having a barrier metal film on their surfaces.
 6. A semiconductor device comprising: a semiconductor substrate; a porous insulating film formed above said semiconductor substrate and having a relative dielectric constant of 2.5 or less, an average diameter of pores in said porous insulating film being smaller in a surface region of said porous insulating film than in an inner region of said porous insulating film; and a plug and/or a wiring layer buried in said porous insulating film.
 7. The semiconductor device according to claim 6, wherein said pores of said porous insulating film have an average diameter which is relatively small in the vicinity of said plug and/or wiring layer and is relatively larger at a region away from said plug and/or wiring layer.
 8. The semiconductor device according to claim 6, wherein said porous insulating film contains at least one material selected from the group consisting of polyarylene, polyarylene polyether, methylsilsesquioxane and polymethylsiloxane.
 9. The semiconductor device according to claim 6, wherein said plug and/or wiring layer is formed of a Cu layer having a barrier metal film on their surfaces.
 10. A method for manufacturing a semiconductor device comprising: forming a porous insulating film above a semiconductor substrate, said porous insulating film having a relative dielectric constant of 2.5 or less; forming a recessed portion on a surface of said porous insulating film; and filling said recessed portion with a conductive material to form a plug and/or a wiring layer; wherein prior to filling said recessed portion with said conductive material, said porous insulating film is placed inside a chamber to expose said porous insulating film to an oxidizing gas flow and a reducing gas flow which have been alternately introduced into said chamber, to take place an oxidation-reduction reaction in said porous insulating film, thereby forming a layer of a reaction product on the inner wall of pores of said porous insulating film.
 11. The method according to claim 10, wherein said pores in said porous insulating film formed above said semiconductor substrate has a maximum diameter of 4 nm or more.
 12. The method according to claim 10, wherein said oxidizing gas contains at least one selected from the group consisting of O₂, N₂O, Cl₂, F₂, O₃ and WF₆.
 13. The method according to claim 10, wherein said reducing gas contains at least one selected from the group consisting of SiH₄, H₂ and HF.
 14. The method according to claim 10, wherein forming a layer of reaction product onto the inner wall of the pores of said porous insulating film is performed subsequent to forming a recessed portion on said porous insulating film.
 15. The method according to claim 10, wherein said porous insulating film contains an organic component and said reaction product contains a silicon oxide.
 16. The method according to claim 10, wherein filling said recessed portion with a conductive material to form a plug and/or a wiring layer includes depositing a Cu layer through a barrier metal film.
 17. A method for manufacturing a semiconductor device comprising: forming a porous insulating film above a semiconductor substrate; forming a recessed portion on a surface of said porous insulating film; and filling said recessed portion with a conductive material to form a plug and/or a wiring layer; wherein said porous insulating film is irradiated with electron beam to enlarge the size of pores of said porous insulating film.
 18. The method according to claim 17, wherein said pores of porous insulating film formed above said semiconductor substrate has an average diameter of 1 nm or less.
 19. The method according to claim 17, wherein enlarging the size of said pores through irradiation of electron beam onto said porous insulating film is performed subsequent to filling said recessed portion with a conductive material.
 20. The method according to claim 17, wherein filling said recessed portion with a conductive material to form a plug and/or a wiring layer includes depositing a Cu layer through a barrier metal film. 